Occasional Contributor
Regular ContributorHi Mohammed_Lami,
I may not understanding what you are looking into.
There is a new boot flow that we use now which is found in this link:
If you are checking on the older document I think this is the document that may help:
Thanks.
Regards,
Aik Eu
Occasional ContributorHi aikeu, thank you very much for your response
Actually, the boot flow is already done in my design. However, my concern in points (I and II), it is about how to generate the ".hex" file that contains the source code that should be executed by the A9 HPS processor.
As I explained, after the processor is booted successfully, I need to use it to execute a specific function. Previously, I used "ARM MDK Keil" software to write a "C" program, then the software generates the source code (inside the ".hex" file) after compiling the project; this code was copied to the directory of Quartus project and represented the contents of the on-chip RAM; after power on the FPGA board and booting the Cortex-M0 successfully, the processor accessed the RAM contents (source code of the ".hex" file) and ran it, this was done on Cyclone IV chip.
But now I am trying to execute another "C-code" on the Cyclone V dev. kit. My specific concern is generating of the source code that going to be stored at the on-chip RAM, the MDK tool can not work with A9 processor of Cyclone v. I also investigated ARM DS-5 tool, it is compatible with the A9 processor, but can't generate the source code seemingly.
Thank you
