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Savino's avatar
Savino
Icon for New Contributor rankNew Contributor
1 year ago
Solved

Simulating by ModelSIM signals multiple blocks nested inside each other on quartus||

good morning, in the quartus|| environment I inserted in a new schematic file, two blocks: an LPM Counter and an LPM compare and other signal like clock, ect. After that I created a new block contain...
Fpga Devkit
  • ShengN_altera's avatar
    ShengN_altera
    1 year ago

    Hi,

    Please follow the previous mentioned steps.

    In work library, double click the main screenshot:

    In object panel, you'll see those signals clk, clk_en, cnt_en, as_res, spi, out. Select all and right-click -> Add Wave screenshot:

    Those signals will be added to wave panel screenshot:

    Thanks,

    Regards,

    Sheng

Savino's avatar
Savino
Icon for New Contributor rankNew Contributor
1 year ago

I ask at the end some tips: can you explain the procedure to change the extension to the file from .bdf to .hdl? This why I am not sure wich file I need to change the extension, at main file or at the file that contain all the block. I tried to change at one file but after i am not able anymore to see the file himself since i change the extension. This only please.