Selecting correct clock signal on Cyclone V GT DevKit

You connected the LEDs to DIP switches (USER_DIPSW[3..0]), not the push buttons (USER_PB[2.0] on pins AN8, AA15, and AK13), so the LED's will be set based on the switch setting not the board pushbuttons. Your LED voltages are wrong as well. They should be 1.5 V according to the manual. The clock is OK on AG18 for 100 MHz or V28 for 50 MHz though again the I/O standard is wrong (should be LVDS). You can ignore the warnings for I/O because that just means you have to fill in each and every I/O assignment for each pin.

Also, this is a very strange way to code a counter/register since you check the reset signal twice in the same always block. Here's some better code (I didn't test the code but this makes more sense):

  reg [31:0] cntReg;
  wire  max = cntReg == 32'hee6b280;
  wire [31:0] cntNext = cntReg + 32'h1;
  reg  regOut;
  wire  inverse = ~regOut;

  assign io_out = regOut;
  assign io_leds = io_buttons;

  always @(posedge clock) begin
    if (reset) begin
      cntReg <= 32'h0;
      regOut <= 1'h1;
    end
    else begin
      if (max) begin
         cntReg <= 32'h0;
         regOut <= inverse;
      end
      cntReg <= cntNext;
    end
   end
endmodule