romstyle="MLAB" attribute is ignored

Hello KhaiY,

I'm using Quartus Standard 18.0 for Windows. Here is my full code snipet if you wish to reproduce. Three scenarios:

• Code as is, all settings default, it results in the ROM being implemented with one M10K.
• romstyle removed, all settings default, it results in the ROM being implemented generic logic due to its small size. (Uninfered RAM logic)
• romstyle removed, "allow rom size recognition: on", it results int the ROM being implemented with one M10K

Example Code:

module ROM_init

#(parameter DATA_WIDTH=8, ADDR_WIDTH=5)

(

input clk_50,

input [(ADDR_WIDTH-1):0] addr,

output [(DATA_WIDTH-1):0] q_o,

output [(DATA_WIDTH-1):0] p

);

// ROM Test

// Quartus Prime Verilog Template

// Single Port ROM

assign q_o = q;

// Declare the ROM variable

reg [(DATA_WIDTH-1):0] q;

(* romstyle="mlab"*) reg [DATA_WIDTH-1:0] rom[2**ADDR_WIDTH-1:0];

reg [(ADDR_WIDTH-1):0] addr_reg;

initial

begin

$readmemb("baseline.txt", rom);

end

always @ (posedge clk_50)

begin

addr_reg <= addr;

q <= rom[addr_reg];

end

// IP Catalog version for comparisson

//rom1port rom1port_inst (

//.address ( addr ),

//.clock ( clk_50 ),

//.q ( p )

//);

endmodule

// For reference baseline.txt is as follow:

/*

00000000

00000001

00000010

00000011

00000100

00000101

00000110

00000000

00000000

00001000

00010000

00100000

01000000

10000001

10000010

00000000

00000001

00000010

00000011

00000100

00000101

00000110

00001000

00010000

00100000

01000000

10000001

00001000

00010000

00001000

*/