Forum Discussion
Remote System Upgrade for MAX10 in FPGA fabric.
Hi, Is there a demo design for RSU which would be fully implemented in RTL? I wold like to avoid implementing uC, so I wold love to use some referance design so I can implement RSU by a mix of Intel IP and custom RTL code (Verilog).
Thx
3 Replies
- YuanLi_S_Intel
Regular Contributor
Hi Tomasz,
We have some sample design for that but it is using RSU IP. Please take a look.
https://fpgacloud.intel.com/devstore/platform/15.1.0/Standard/remote-system-upgrade-rsu-lab-max-10-development-kit-version/
Thank You
- TOlew1
New Contributor
Hi SooY_Intel
Thank you for your reply.
The desing you suggested is based on Nios II processor. I am looking for a solution which would not require processor, the solution which would be based only on RTL. Is there a referance design I could use to infrm my design decision? Also, is there a document which would fully and clearly describe what that RTL based solution would have to include, and how the process of performing RSU sequence should be sequence? I can created the state machine in RTL which would do the work as long as I have a clear requirements for it.
Regards
- YuanLi_S_Intel
Regular Contributor
Hi Tomasz,
Apologize that we do not have solution with RTL. There is no dedicated IP for that and all requires NIOS ii to do the remote updating.
Thank You.