New Contributor
New ContributorHi !
The datasheet of D5005 card (link here, go to pg 3 of 29) specifies it is a PCI Express Gen 3 x16 compliant card. According to the specification of PCI Express, Gen 3 x16 should give bandwidth of 15.75 GB/s (source here). However we are unable to achieve it.
Regards
Sneha
Frequent ContributorHi SNEHA
The spec you are mentioning here is the ideal case for a PCIE transfer rate. The testing you are doing involve the overhead of data transfer from host to FPGA and back to host. We can't compare both the numbers.
Thanks.
Eng Wei
New ContributorHi!
Thank you for your response. I agree that data transfer from host to FPGA and then back to host involves some overhead and thus the specified bandwidth cannot be reached. However, could you kindly let us know what is the practically achievable maximum bandwidth via PCIe (v3, x16) for d5005 board (considering the overhead)? And, how to achieve it? It would be of great help to us.
Thank you
Regards
Sneha
Frequent ContributorHi Sneha
You can refer to section 5. Running FPGA Diagnostics of https://www.intel.com/content/www/us/en/programmable/documentation/edj1542148561811.html#iyl1548632576241
for FPGA diagnostic sample test. The sample results might be different involving various factors of the testing environment.
Thanks.
Eng Wei
Frequent ContributorHi Sneha
We do not receive any response from you to the previous answer that have been provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
Thanks.
