New ContributorHi,
I'm running Altera's Cyclone5 SOCFPGA provided by terasic development kit. Running Linux 4.19 with U-Boot 2017.11.
In U-Boot; I'm reading reset_manager's status register to know the boot source/reason. On warm reboot; I read a valid value (SWWARM) but for a PowerUp (hard power cycle), I read a value 0x0.
What is it that I am doing wrong here?
- MA
Regular ContributorHi,
Please refer here, or jump to page 6 for the boot room flow diagram;
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-v/cv_5400a.pdf
Regards.
New ContributorHi,
Thanks for your response to my question. But how does that specific section answers my question? It talks about Boot ROM and preloader. I need to know/read 'Reset Manager's Status register' in U-Boot (secondary bootloader).
In U-Boot, I have access to Reset Manager (0xFFD05000). But when I read its status register (stat @ offset 0x0); I read a value of 0x0 in case of cold boot. which is not true (for a warm boot, I read a correct non-zero value). This is my problem. Why Reset Manger's 'stat' register doesn't provide required information upon cold boot?
Regular ContributorHi,
Are you able to bring up the board? Because on a cold reset, the HPS boot process starts when CPU0 is released from reset (for example, on a power up) and executes code in the internal boot ROM at the reset exception address, 0x00000000.
Are you running into any other issue while executing your booting process?
New ContributorEven if this thread is kind of old, I want to add that what I was missing/overreading (while struggling with the same issue) was this part:
"During the boot process, the Boot ROM copies the STAT register value into memory before clearing it. After booting, you can read the value of the reset status register at memory address (r0 + 0x0038)."
So if the contents of the STAT register is 0, Boot ROM already cleared it and SPL can read the backup via "readl(r0 + 0x38)". On warm reboot, Boot ROM obviously doesn't clear it and you can read it as usual.
Regards,
Simon
