Quartus assigns Pins labeled Input and Output as Bidir

This is a simple test to confirm what I’m doing will work before I invest too much repeating errors in the overall system. Using the un-clocked Preset and Clr inputs is an easy way to do this test. Ultimately, design I sent is for Control Panel buttons and indicators; in the final design, the Ds and Clocks will be used for inter-register xfers.

Among the many, many Quartus documents and videos available, I found one that recommended extending buses as I have. You’ll probably recognize that one of the major challenges for learning this complex device and all surrounding it is the plethora of info, some very helpful and some awful, with no good way to filter chaff from wheat.

Regardless, as you suggest, I removed the bus-extensions and recompiled. It made no difference, including to the single-pin, un-extended GPIO_15. I.e., all pins still Bidir.

Thanks,

Bill