Forum Discussion
Hi @gustifix2,
The error seems weird and it seems to be coming from the board test sample which are checking on FPGA board interface in this case the host and fpga. Suspect it maybe be a hardware issues/hardware configuration issues. May not be related to oneAPI setup. Hence would suggest to run the board test sample separately just to narrow down the issues, the repo are as below:
Perhaps it will also be good to validate the Agilex7 with the BTS. More details of the board test system can be found in the link below:
- https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/agi027.html (at the Table 3. Documentation)
Hope that clarify.
Best Wishes
BB
For the board_test sample only 3 of the 7 tests pass, 2 (kernel clock frequency), 4 (kernel latency measurement), and 7 (unified shared memory bandwidth). I attached the full output.
Edit: I just saw that test 7 is actually skipped because the board does not support USM, so only 2 and 4 passed.
I also noticed the following error that continually appears in dmesg:
[ +0.000126] pcieport 0000:00:01.0: AER: Correctable error message received from 0000:00:01.0 [ +0.000002] pcieport 0000:00:01.0: PCIe Bus Error: severity=Correctable, type=Physical Layer, (Receiver ID) [ +0.000001] pcieport 0000:00:01.0: device [8086:a70d] error status/mask=00000001/00002000 [ +0.000000] pcieport 0000:00:01.0: [ 0] RxErr (First)
The BTS looks fine. I attached pictures of the 3 memory tests as examples.
Thanks and best wishes!
Felix