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sf69
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4 years ago

quartus_hps error: Encounter invalid ACK status while accessing HPS

hi

i'm working on the Cyclone V SoC Development Kit and i want to program the quad SPI Flash using the Quartus II Programmer.

first, i validate that my USB-blasterII is correctly detected:

$ jtagconfig
1) USB-BlasterII [6-2]
4BA00477 SOCVHPS
02D020DD 5CSEBA6(.|ES)/5CSEMA6/..
020A40DD 5M(1270ZF324|2210Z)/EPM2210

ok, and now i try to program with my new u-boot-with-spl.sfp file:

$ quartus_hps -c 1 -o pv -a 0x000000 u-boot-with-spl.sfp

Current hardware is: USB-BlasterII [6-2]
Hardware frequency: 16000000
Found HPS at device 1
Double check JTAG chain
HPS Device IDCODE: 0x4BA00477
Error: Encounter invalid ACK status while accessing HPS
Error: send_access_data() error while accessing DP Register
Error: Fail to power up the System and Debug power
Error: Quartus Prime Programmer was unsuccessful. 0 errors, 0 warnings
Error: Peak virtual memory: 122 megabytes

Any idea ?

thanks

3 Replies

    • sf69's avatar
      sf69
      Icon for New Contributor rankNew Contributor

      hi, thanks

      so, i respect all instructions in the latest boot flow document and i get the same error:

      $ mkdir ~/new_boot_flow
      $ cd ~/new_boot_flow
      $ wget https://developer.arm.com/-/media/Files/downloads/gnu-a/10.2-2020.11/binrel/gcc-arm-10.2-2020.11-x86_64-arm-none-linux-gnueabihf.tar.xz
      $ tar xf gcc-arm-10.2-2020.11-x86_64-arm-none-linux-gnueabihf.tar.xz
      $ export PATH=`pwd`/gcc-arm-10.2-2020.11-x86_64-arm-none-linux-gnueabihf/bin:$PATH
      $ mkdir cv_example.qspi
      $ cd cv_example.qspi
      $ export TOP_FOLDER=`pwd`
      $ cd $TOP_FOLDER
      $ mkdir cv_soc_devkit_ghrd
      $ cd cv_soc_devkit_ghrd
      $ tar xf ~/intelFPGA/20.1/embedded/examples/hardware/cv_soc_devkit_ghrd/tgz/*.tar.gz
      $ rm -rf software
      $ cd $TOP_FOLDER/cv_soc_devkit_ghrd
      $ mkdir -p software/bootloader
      $ ~/intelFPGA/20.1/embedded/embedded_command_shell.sh bsp-create-settings --type spl --bsp-dir software/bootloader --preloader-settings-dir "hps_isw_handoff/soc_system_hps_0" -\
      -settings software/bootloader/settings.bsp
      $ cd $TOP_FOLDER/cv_soc_devkit_ghrd/software/bootloader
      $ git clone https://github.com/altera-opensource/u-boot-socfpga
      $ cd u-boot-socfpga
      $ cd $TOP_FOLDER/cv_soc_devkit_ghrd/software/bootloader/u-boot-socfpga
      $ ./arch/arm/mach-socfpga/qts-filter.sh cyclone5 ../../../ ../ ./board/altera/cyclone5-socdk/qts/
      $ cd $TOP_FOLDER/cv_soc_devkit_ghrd/software/bootloader/u-boot-socfpga
      $ export CROSS_COMPILE=arm-none-linux-gnueabihf-
      $ make socfpga_cyclone5_qspi_defconfig
      $ make -j 48
      $ cd $TOP_FOLDER/
      $ sudo rm -rf qspi_bin && mkdir qspi_bin && cd qspi_bin
      $ cp ../cv_soc_devkit_ghrd/software/bootloader/u-boot-socfpga/u-boot-with-spl.sfp .
      $ cd $TOP_FOLDER/qspi_bin
      $ ~/intelFPGA/20.1/embedded/embedded_command_shell.sh quartus_hps -c 1 -o pv -a 0x000000 u-boot-with-spl.sfp
      Info: *******************************************************************
      Info: Running Quartus Prime Programmer
      Info: Version 20.1.0 Build 711 06/05/2020 SJ Standard Edition
      Info: Copyright (C) 2020 Intel Corporation. All rights reserved.
      Info: Your use of Intel Corporation's design tools, logic functions
      Info: and other software and tools, and any partner logic
      Info: functions, and any output files from any of the foregoing
      Info: (including device programming or simulation files), and any
      Info: associated documentation or information are expressly subject
      Info: to the terms and conditions of the Intel Program License
      Info: Subscription Agreement, the Intel Quartus Prime License Agreement,
      Info: the Intel FPGA IP License Agreement, or other applicable license
      Info: agreement, including, without limitation, that your use is for
      Info: the sole purpose of programming logic devices manufactured by
      Info: Intel and sold by Intel or its authorized distributors. Please
      Info: refer to the applicable agreement for further details, at
      Info: https://fpgasoftware.intel.com/eula.
      Info: Processing started: Mon Jun 28 10:11:29 2021
      Info: Command: quartus_hps -c 1 -o pv -a 0x000000 u-boot-with-spl.sfp
      Current hardware is: USB-BlasterII [6-2]
      Hardware frequency: 16000000
      Found HPS at device 1
      Double check JTAG chain
      HPS Device IDCODE: 0x4BA00477
      Error: Encounter invalid ACK status while accessing HPS
      Error: send_access_data() error while accessing DP Register
      Error: Fail to power up the System and Debug power
      Error: Quartus Prime Programmer was unsuccessful. 0 errors, 0 warnings
      Error: Peak virtual memory: 122 megabytes
      Error: Processing ended: Mon Jun 28 10:11:30 2021
      Error: Elapsed time: 00:00:01
      Error: Total CPU time (on all processors): 00:00:00