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AKuma59's avatar
AKuma59
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7 years ago

Quartus crashes after back annotation pins

​I am using MaxV device with one pair of LVDS_E_3R. I can compile the design when I don't give any pin location assignment. However after the compile I do back annotation for pin and then when I hit...
AKuma59's avatar
AKuma59
Icon for New Contributor rankNew Contributor
7 years ago

Hi! Sree,

The QAR is just a MUX structure. There in no LVDS related IP. I am trying to do a pin placement. The output of the MUX will drive the LVDS receiver chip connected to the CPLD. So two pins on bank 2 of the MAX V CPLD is set to LVDS_E_3R.

If I use Qii11.1 sp2, I don't see any compile error and the same QAR works just fine. But when I try to compile it with Qii18.1 prime (std or lite) , I get the Quartus crash.