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Altera_Forum
Honored Contributor
16 years agoThank you very much. But there is no problem with my code. Today I found the real failure.
I have looked at the CLOCK signal and the HSYNC signal with an oscilloscope and found out, that the clock is total asynchronous to the HSYNC. When I triggered to one of them, the other one runs totally away. But I tried it with several DE2 Boards in the laboratory and realized another fact. Altera made two revisions of the DE2 Board. My Board was revision 1. But today I tried it with some boards of revision two and tada: the HSYNC comes with the falling edge of the clock. No running away of the other signals. So I think it would be better for me to use the DE2 Board Revision 2 for working with the Video Decoder :) I'm so glad, that I found this mistake. I would never thought of that. I'm out. Alex PS: i attached the fotos, for the proof of all that :) the first one is with Revision 2 and the second picture is with Revision 1.