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Altera_Forum
Honored Contributor
Honored ContributorPCISIG Compliance of Stratix V GX FPGA Development Board ??
Can anyone say if the Stratix V GX FPGA development board passes the PCISIG compliance tests for Gen3 ? Or has been to a PCISIG "plugfest". I ran the board configured as Gen3 X1 , which worked...
Altera_ForumHonored Contributor
Honored ContributorThis seems to indicate the preset is fixed ...
• Stratix V PCIe Hard IP Presets: http://www.altera.com/support/kdb/solutions/rd01232015_198.html My question then is what to do to get the Stratix V Gen3 design to be PCI SIG compliant given it has to negotiate 3 presets to apss the compliance tests. I myst be missing something here
