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Occasional Contributor

6 years ago

PCIe hard IP example design generation fail

Hi I generate example design of Stratix PCIe hard IP and get error message as following figure. Could you please fix the problem? PS. I'm using Quartus v18.1.2 and v19.1.

CHung

Occasional Contributor

6 years ago

By the way, the reference design is:

https://fpgacloud.intel.com/devstore/platform/19.1.0/Pro/an881-pcie-avmm-dma-gen3x16-ddr4-and-hbm2/

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PCIe hard IP example design generation fail

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