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CHung's avatar
CHung
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

PCIe hard IP example design generation fail

Hi I generate example design of Stratix PCIe hard IP and get error message as following figure. Could you please fix the problem? PS. I'm using Quartus v18.1.2 and v19.1.
SengKok_L_Intel's avatar
SengKok_L_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

I'm using v19.1 to generate the Avalon-MM intel Startix 10 Hard IP+ example design by using the default setting, but I can't see the same error.

Questions:

  1. How do you configure the IP? Does using default settings also having the same issue?
  2. What is the OPN (Device's full name)?

Regards -SK

CHung's avatar
CHung
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Hi SK,

​

  1. I got the same errors either using default setting or selecting gen3x8 configuration.

2. The device full name is 1SM21CHU1F53E1VG.

Thanks.

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