PCB Design Guideline for Cyclone V SoC Peripherals (HPS side)

Question

Hello,I am trying to build my custom board for Cyclone V 5CSEBA6 (just like DE10 Nano), but I am unable to find any information about the PCB design guidelines of HPS Peripherals like RAM, HDMI etc. About the routing topology and impedance values of single ended and differential signals.

tehjingy_altera · Answer

Hi You could take a look the design guideline below:https://www.intel.com/content/www/us/en/docs/programmable/683360/18-0/overview-of-the-design-guidelines-for.htmlRegardsJingyang, Teh

tehjingy_altera · Answer

Hi Do you managed to go through the document?Are there any follow up question on this?RegardsJingyang, Teh

tehjingy_altera · Answer

HiAs we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.RegardsJingyang, Teh

mahsheed · Answer

Yes, I have skimmed that document. It does not talk about the PCB design guideline at all. I need to know the information about the PCB specific design guideline like the Clock (min) value as shown in the attached pic. Further the impedance values, SDRAM Topology etc etc.

kennyt_altera · Answer

reopening the case

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PCB Design Guideline for Cyclone V SoC Peripherals (HPS side)

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