OpenCL 19.3 SD Card image for Intel Arria 10 Development Kit

Hi,

I have used the flow from the base revision compile as stated in the manuals. I can reproduce with the following steps on an Ubuntu 18.04 with the Intel OpenCL for FPGA version 19.3:

source $INTELFPGAOCLSDKROOT/init_opencl.sh
cp -r $INTELFPGAOCLSDKROOT/examples_aoc/vector_add/ .
cd vector_add/device/
aoc -bsp-flow=base vector_add.cl
cd vector_add/
cp -r $INTELFPGAOCLSDKROOT/board/a10soc/hardware/a10soc_2ddr/* .
$INTELFPGAOCLSDKROOT/../qsys/bin/qsys-edit acl_kernel_interface_soc_pr.qsys --quartus-project=top.qpf
$INTELFPGAOCLSDKROOT/../qsys/bin/qsys-edit ddr4.qsys --quartus-project=top.qpf
$INTELFPGAOCLSDKROOT/../qsys/bin/qsys-edit dual_port_splitter.qsys --quartus-project=top.qpf
$INTELFPGAOCLSDKROOT/../qsys/bin/qsys-edit kernel_mem.qsys --quartus-project=top.qpf
$INTELFPGAOCLSDKROOT/../qsys/bin/qsys-edit mem.qsys --quartus-project=top.qpf
$INTELFPGAOCLSDKROOT/../qsys/bin/qsys-edit DMA_system.qsys --quartus-project=top.qpf
$INTELFPGAOCLSDKROOT/../qsys/bin/qsys-edit board.qsys --quartus-project=top.qpf
quartus --64bit top.qpf

For each of the .qsys files, I have updated all of the IPs to the newest version, which is either 19.1 or 19.3, synced all the system infos, validated the system integrity and generated HDL.

Furthermore, I have renamed the name of the 'Arria 10 HPS IP' from 'arria10_hps' to 'a10_hps'. Finally, I've changed the bitwidth of the fpga_to_sdram_dma in DMA_system.qsys from automatic to 37 bits.

In Quartus, I just hit 'Start compile' as stated in the guide.

I have zipped and attached the folder 'device/' folder.