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Gouri's avatar
Gouri
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2 years ago

On chip flash memory not updating avmm_data_readvalid signal in Read operation

https://www.intel.com/content/dam/altera-www/global/en_US/uploads/7/73/MAX10_On-Chip_Flash_IP_Read_Operation_Example.pdf With respect above document of read write operation in On chip flash UFM IP...
Fpga Devkit
ShengN_altera's avatar
ShengN_altera
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2 years ago

Hi Gouri Adsure,

Have you use the same setting like the original design On-Chip Flash IP check the screenshot attached?

I had used a new On-Chip Flash IP named flash_ip1 which is generated in VHDL and followed the same setting. Then instantiated that ip in top verilog module and compiled as mixed language. I'm able to see the same result on flash_ip1.

Attached the file for your reference.

Thanks,

Regards,

Sheng

Gouri's avatar
Gouri
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2 years ago

Hello,

Thank you for your valuable time.

  • Is there any On-Chip Flash IP setting difference for FPGA 10M16SCU169I7G.
  • Is Any change in avmm_data_burstcount for above FPGA.
  • Any other changes we need to do for this FPGA as per datasheet for read write operation.

Thank You

Gouri Adsure