Nios II on the De0-Nano-SoC

It's a rather unusual design so I'm not sure you'll find examples of this. Basically you should connect both masters to the F2SDRAM, at the same address. The address itself is not that important. You will also need to make sure you updated and recompiled the preloader for the HPS, and that you run it to enable the bridge. (AFAIK the bridge is enabled in the preloader). Don't put anything on the HPS's flash or the HPS CPU will attempt to boot on it and copy its software to the SDRAM, interfering with your application.

For the NIOS what I'd do first is to include a 64ko on chip memory, also connected to both masters, and use it as main memory at first. Try to run a memory test program from there, that would read and write in the SDRAM. If it works, then try and put your program there.

If it doesn't work, put some signaltamp probes on the F2SDRAM slave interface to find out where it is stuck and what the CPU is trying to do.