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AShiv's avatar
AShiv
Icon for New Contributor rankNew Contributor
8 years ago

Nios II on the De0-Nano-SoC

I am wondering if it is possible to use just the Nios II and FPGA portion on this board, aka without HPS. So, that the Nios II doesn't need to use the HPS bridges to access the DDR3. I know it makes ...
Abe's avatar
Abe
Icon for Frequent Contributor rankFrequent Contributor
8 years ago

The DDR3 memory on the DE0-Nano is only accessible using the HPS since the DDR memory pins are directly routed/connected to the HPS I/O in the board.

Why not try using onchip RAM for NIOS-II? What is your memory requirement for processing the UDP packets? Can it be done using on-chip memory?