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Honored Contributor
Honored ContributorNios II and ADC -- Cyclone III Dev. Board
Sorry, I've only just started using Altera FPGAs, and so far things went fine with Verilog and without using Nios II. I would now like to use a Nios II soft-processor for some signal processin...
Altera_ForumHonored Contributor
Honored ContributorYou could write a verilog block that reads the ADC and make it into a custom component for SOPC. That way your sample block could be connected to NIOS via the avalon bus.
http://www.altera.com/literature/hb/qts/qts_qii54004.pdf If you like you can use a dma controller to write the data directly from your sample block to the SDRAM if you like, that could be useful if you sample at a high rate. Best Regards, Ola Bångdahl
