Multiprocessors on DE2

Those warnings are expected. SOPC Builder is re-assigning the ID values to make sure they are unique per IP core so passing -i 0 will access the first CPU and JTAG UART and -i 1 will access the second pair.

If you have both processors sharing the same code memory then I would place the first CPU exception address at the beginning of the memory and the second CPU exception address at the middle of the memory. This should effectively cut the memory in half with each CPU using a half for code/data.

Download your code and open a terminal to one CPU and JTAG UART at a time to make sure each works on it's own. Then you can bring up the entire system at once. Make sure to pass in the -i 0 or -i 1 to the nios2-terminal as well to make sure you select the correct UART to connect to.

Another handy command I use all the time is 'jtagconfig -n'. This will print all programming cables, devices, and JTAG nodes hooked up to the JTAG server. The JTAG debug module should show up as 191046xx where 'xx' is the instance number. The JTAG UART should show up as 0C006Exx where 'xx' is the instance number. If you see other values in there they could be other things like Signaltap.

Yes you can share memories on different clock domains. SOPC Builder will add clock crossing adapters automatically for you if the master and slave are on different clock domains. For code I recommend adding a clock crossing bridge between the CPU and RAM since it'll pipeline read and write commands. For more details you can find them in here: http://www.altera.com/literature/hb/nios2/edh_ed51007.pdf