Thanks for your answer.
Now I have two JTAG-UARTs in my SOPC-project, which I attached, but I get this warnings:
Warning: currently assigned JTAG instance ID 0 for cpu_1/jtag_debug_module is shared by cpu_2/jtag_debug_module. Reassigned to 1.
Warning: currently assigned JTAG instance ID 0 for jtag_uart_0/avalon_jtag_slave is shared by jtag_uart_1/avalon_jtag_slave. Reassigned to 1.
and when I try to run my NIOS II Project I get this message:
Using cable "USB-Blaster [USB-0]", device 1, instance 0x01
Pausing target processor: OK
Reading System ID at address 0x00081058: verified
Initializing CPU cache (if present)
OK
Downloading 02000000 ( 0%)
Downloaded 60KB in 1.0s (60.0KB/s)
Verifying 02000000 ( 0%)
Verified OK
Leaving target processor paused
Also I am a bit confused about where to put my Reset-/Exception vectors, at the moment both are for each cpu in the SDRAM ( CPU_1 0x200000 and 0x200020 cpu_2 0x210000 and 0x210020), furthermore .text,.rwdata, rodata and stack/heap memory are stored in SDRAM.
What I need at the moment are 2 processors which share SRAM and SDRAM, to realize that I use two mutexs.
Another question is, if it is possible to run one CPU at 100Mhz and the other at 50Mhz, sharing memory.
Thanks again for your help
Best wishes