Altera_Forum
Honored Contributor
Honored ContributorMax 10 Dev Kit DDR3 Singal Integrity Testing
Is there a way to test DDR3 signal integrity on the Max 10 dev kit? I'm wondering if these signals are accessible anywhere.
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Altera_ForumHonored Contributor
Honored ContributorCheck out the following links for the Max 10 IO models:
IBIS model - www.altera.com/support/support-resources/download/board-layout-test/ibis/ibs-ibis_index.html Hspice model - www.altera.com/support/support-resources/download/board-layout-test/hspice.html
