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Occasional Contributor

6 years ago

lwh2f

I'm trying on arria 10 SoC GHRD and like to add a register block on FPGA side to LW AXI4 interface for control and status. There is hps_lw_axi_master connected to SYS ID, PIO etc. How would my ...

sstrell

Super Contributor

6 years ago

Are you asking how to create a custom component and connect it to the lightweight bridge? The Platform Designer user guide discusses this and this training goes into detail on the process:

https://www.intel.com/content/www/us/en/programmable/support/training/course/oqsys3000.html

#iwork4intel

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lwh2f

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