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Yes you will need to write a MDIO master to be able to configure the PHY chip first. Note that the PHY datasheet isn't publicly available and you have to sign a rather restrictive NDA with Marvell if you want to get hold of it. You can go around it though and can have a look at the ALtera Nios dirver to see how the chip is initialized.
Then you can directly connect a custom design to the PHY's RGMII interface. Of course you will have to generate/detect the preamble part of the packet and handle all the Ethernet protocol yourself, and probably add a MAC/protocol filter on the input side because a PC is very talkative a lot when you connect something to its Ethernet port ;)
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Could you please tell me where the altera nios driver I need to look at is located and what it is called? I have not had any luck in locating the Marvell datasheet and I need to see how the 88E1111 is initialized.
Thanks,
Phil
Honored Contributor
