Intel socFpga Agilex 7 security features case(authentication, en/decrypt, hash, customer defined se)

- provide Black Key Provisioning Service Distribution

"We sincerely apologize for the inconvenience caused by the delay in addressing your Forum queries. Due to an unexpected back-end issue in our system, your Forum cases, along with others, did not get through as intended. As a result, we have a backlog of cases that we are currently working through one by one.

Please be assured that we are doing everything we can to resolve this issue as quickly as possible. However, this process will take some time, and we kindly ask for your patience and understanding during this period. The cases will be attended by AE shortly.

We appreciate your patience and understanding, and we are committed to providing you with the best support possible.

Thank you for your understanding."

Hello,

referrence code, doc, menu for fpga/hps image sign/verify,

encrypt/decrypt, hash and some customer defined security services

You can find all the information from : https://www.intel.com/programmable/technical-pdfs/683823.pdf

AN968 : Black Key Provisioning (link : https://www.intel.com/content/www/us/en/secure/content-details/739071/an-968-black-key-provisioning-service-quick-start-guide.html?wapkw=AN968)

- how to program efuse without JTAG :

<ANS>efuse is programmed through SDM

- User defined fuses size: we can only read 16 words(32bit), but doc

says there are 32 words(32bit).

<ANS> eFUSE size is 2048bits(256bytes)

- what's the using scenario for EFUSE/BBRAM/PUF?

<ANS> Military, IP protection

- what's BBRAM's battery life expectancy?

<ANS> at least 2 years.

- how Agilex 7 SDM prevent EFUSE illegall copy?

<ANS> no access to SDM

- can signed fpga bitstream work on disabled security fpga board?

<ANS> No

- can we get fpga chip id without power on chip?

<ANS> No. Chip ID need to access during user mode.

rgards,

Farabi