Hello,
Thank you for the suggestion, tried it below:
// emif_0_ecc_core: unknown@0x100000040 {
// compatible = "unknown,unknown-16.1";
// reg = <0x00000001 0x00000040 0x40000000>;
// clocks = <&emif_0_arch 0>;
// }; //end unknown@0x100000040 (emif_0_ecc_core)
memory {
device_type = "memory";
reg = <0xc0000000 0x20000000>;
}; //end memory
It produced a warining:
>dtc -I dts -O dtb -o trial_20190325a.dtb ghrd_10as066n2_20190325.dts
Warning (reg_format): "reg" property in /sopc@0/bridge@0xc0000000/memory has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1)
Did somed edit (copied other entry under sopc@0):
memory {
device_type = "memory";
reg = <0x00000001 0xc0000000 0x20000000>;
}; //end memory
>dtc -I dts -O dtb -o trial_20190325a.dtb ghrd_10as066n2_20190325.dts
No more warning/error messages. Will try this in actual FPGA kit once project resources are returned.
Thank you very much for the help.