Intel Cyclone® V SE 5CSXFC6D6F31C6N - maximum frequency

Hi there!

I want to do a 8192-FFT. I am searching for an eval board which fits my requirements.

I found the DE10-Standard Development Kit by Terasic with a Intel Cyclone® V SE 5CSXFC6D6F31C6N device.

In Chapter 3.5 (Clock Circuitry) it says:

Figure 3-13 shows the default frequency of all external clocks to the Cyclone V SoC FPGA. A

clock generator is used to distribute clock signals with low jitter. The four 50MHz clock signals

connected to the FPGA are used as clock sources for user logic. One 25MHz clock signal is

connected to two HPS clock inputs, and the other one is connected to the clock input of Gigabit

Ethernet Transceiver. Two 24MHz clock signals are connected to the clock inputs of USB

Host/OTG PHY and USB hub controller. The associated pin assignment for clock inputs to FPGA

I/O pins is listed in Table 3-5.

So am I right that the maximum clock frequency is limited to 50 MHz?

I already started a test design with Quartus Prime and selected the exact Cyclone V device and there I was able running frequencies up to 100 MHz..

I need a maximum frequency of 75 MHz. Is that possible with this FPGA-device?

Thank you in advance.

Best regards

Max