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DaveMM's avatar
DaveMM
Icon for New Contributor rankNew Contributor
2 years ago

In-System Memory Content Editor

Intel Stratix 10 GX FPGA Development Kit L-Tile 1SG280LU2F50E2VG / 1SG280LU3F50E3VGS1 (User guide is not clear) I have configured a ROM to "Allow In-System Memory Content Editor to capture and upda...
Board Debug
Fpga Devkit
ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
2 years ago

Hi,

I'm using RAM to get the data stored in the ROM and able to get every data being recorded in ISMCE check the screenshot below. Instance 0 is ROM while Instance 1 is RAM.

Attached the .hex (WIDTH=8; DEPTH=64;) and .sdc files for your reference. Could you try with the attached .hex file format and see any different? Btw, JTAG frequency is 16Mhz.

Thanks,

Best Regards,

Sheng