New Contributor
Regular ContributorSince the MAX device offers JTAG boundary scan test access, you could write a test program that, thru the JTAG interface, toggles all the I/Os to the external FLASH device to write data to it, and thus program it.
This would mean coming up with an SVF (or equivalent) bitstream that would be sent down to the JTAG interface by some suitable JTAG host controller. I've forced test engineers to do this before. They complied with my request but were not happy.
Alternatively, you could write a custom CPLD image that interfaces to the JTAG pins (they can be reused as standard I/Os, after all) and performs the appropriate R/W accesses to your external parallel FLASH device. More work for you.
Probably not going to find you can do any of this in the standard Intel/Altera Quartur/MaxPlus software.
New ContributorThanks for response..!
I have considered below 3 options -
1) Option-1: Using external JTAG programmer module interfaced to JTAG interface of CPLD
2) Option-2: Using external controller interfaced to JTAG interface of CPLD
3) Option-3: Using custom CPLD image to program Flash memory
Option-1 is best & easy solution.
I'm looking for the following 2 details -
1) Which JTAG Flash Programmer software tool is to be used?
2) What is step-by-step procedure to write parallel Flash using Programmer software
