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SERMASWATHIKA's avatar
SERMASWATHIKA
Icon for Contributor rankContributor
1 year ago

IBIS_WITH_SPECIFIC_RLC&SAME_MODEL

We are migrating the design from Cyclone III device to Cyclone V GX device for resolving over resource utilization issue. Now we have completed the upgradation in both design and board schematic.
Before board fabrication, checking the Signal Integrity for the updated board design.
For that, SI Team requested IBIS Model for FPGA and DDR3 Memory. IBIS model generated from the updated design in Quartus prime standard 22.1 version and shared to the team.
SI Team is requesting the IBIS model with the following specifications:
  1. IBIS model with pin specific RLC values. --reference document
  2. Model selector should be same for all I/O pins (DDR3 I/O).---is this need to be assign manually?

We got one reference from google that is for agilex device,

Generating an Agilex per pin RLC IBIS (.ibs) file (intel.com)

is there anything specific available for cyclone v gx device

Fpga Devkit

3 Replies

  • AqidAyman_Altera's avatar
    AqidAyman_Altera
    Icon for Regular Contributor rankRegular Contributor
    1 year ago

    We sincerely apologize for the inconvenience caused by the delay in addressing your Forum queries. Due to an unexpected back-end issue in our system, your Forum cases, along with others, did not get through as intended. As a result, we have a backlog of cases that we are currently working through one by one.

    Please be assured that we are doing everything we can to resolve this issue as quickly as possible. However, this process will take some time, and we kindly ask for your patience and understanding during this period. The cases will be attended by AE shortly.

    We appreciate your patience and understanding, and we are committed to providing you with the best support possible.

    Thank you for your understanding.


  • AqidAyman_Altera's avatar
    AqidAyman_Altera
    Icon for Regular Contributor rankRegular Contributor
    1 year ago

    Hi,


    Unfortunately, after checking, it looks like Cyclone V does have per pin-RLC values supported in Quartus.


    For the second question, this feature is not an automatic assignment. The enablement of the model selector can be done by users checking the tickbox available in the settings.


    Regards,

    Aqid


  • AqidAyman_Altera's avatar
    AqidAyman_Altera
    Icon for Regular Contributor rankRegular Contributor
    1 year ago

    I hope the previous response was sufficient to help you proceed. As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.