Forum Discussion
26 Replies
- JohnT_Altera
Regular Contributor
Hi,
May I know which CPLD are you refering to? If you are refering to Max 10 device then you can use On-Chip Flash and Remote Update IP which interface with MCU.
- JET60200
Contributor
Hello @JohnT_Intel ,
I'm very interesting with what you meation that " Remote Update IP" , can you share some documents or user guide about this method ? Thanks very much
- JohnT_Altera
Regular Contributor
- 卓袁000
New Contributor
for free?
NOW i am using Quartus Prime 19.1.0.670(free),can i use the " Remote Update IP
- 卓袁000
New Contributor
thank you
cpld:10M02SCE144C8G
NOW i am using Quartus Prime 19.1.0.670(free),can i use the " Remote Update IP "for free?
if i want to use uart to update CPLD,can i use nois ii for fr
- JohnT_Altera
Regular Contributor
Hi,
You can get the reference design from AN741 (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an741.pdf).
- JohnT_Altera
Regular Contributor
Hi,
The remote update IP is free but not Nios II IP.
- 卓袁000
New Contributor
I would like to know whether I can realize" the remote update "using the AN741 reference design in Quartus Prime 19.1.
0.670(free) or not? AN741 reference design use which nois ii IP?
- JohnT_Altera
Regular Contributor
Hi,
You can use remote upadate IP without any issue but not Nios II IP. So might need to use other interface to communicate with Remote Update IP.
- 卓袁000
New Contributor
IF I can use the AN741 reference design to realize remote update CPLD(10M02SC) for free
if i can not use nois ii for free? how i can realize? can you give me a reference?
thank you very much.
- JohnT_Altera
Regular Contributor
Hi,
You might be able to use but with certain limitation. You can only use the Nios II/e version and the limitation below.
Nios II/e[edit]
The Nios II/e core is designed for smallest possible logic utilization of FPGAs. This is especially efficient for low-cost Cyclone II FPGA applications. Features of Nios II/e include:
- 卓袁000
New Contributor
thank you for your reply. now i want to use exteral QSPI FLASH to
- JohnT_Altera
Regular Contributor
Hi,
Is it using CPLD as well? For QSPI Flash, I would recommend you to use Generic Serial Flash Interface IP (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-gen-sfi.pdf)
- 卓袁000
New Contributor
yes,it is using cpld.
the datasheet in generic serial flash interface IP write as“Intel MAX® 10 (For general purpose memory only)”?can i use it realize configure CPLD like configuration FPGA? thank you
- JohnT_Altera
Regular Contributor
Unfortunately Max 10 does not support it and you can only used it for general purpose.
- 卓袁000
New Contributor
i want to use mcu to write .pof to QSPI FLASH,how can i realize to use qspi flash to configure max10 CPLD? can you offer a design to me?thank you very much.
- JohnT_Altera
Regular Contributor
Hi,
May I know what is the purpose to write .pof to QSPI? The reason is that you are not able to use the .pof stored in QPSI to configure the Max 10 device.
For the design that does not require Nios, you may also try https://fpgacloud.intel.com/devstore/platform/17.1std.1/Standard/i2c-remote-system-update-example/ design example.
- JohnT_Altera
Regular Contributor
Do you have any queries on the design example?
- JohnT_Altera
Regular Contributor
Hi,
You can get the file from https://docplayer.net/136811234-I2c-remote-system-upgrade-example-max-10.html.
- 卓袁000
New Contributor
thank you for the document.
now i want to know if i can download the i2c project for free without purchasing the development board?
if i can download,where is the download address?
- 卓袁000
New Contributor
thank you for the document.
now i want to know if i can download the i2c project for free without purchasing the development board?
if i can download,where is the download address?
thank you