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JSieg4's avatar
JSieg4
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6 years ago

How to tri-state the configuration pins after configuration with CycloneV?

Hello, We work with a CycloneV in active serial configuration mode. The EPCS config flash is connected to the FPGA and also in parallel to an external microcontroller. The idea is to update the FPG...
JSieg4's avatar
JSieg4
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6 years ago

Hi,

Sorry for the vague question.

I mean DATA0, nCSO and DCLK.

There is this option under: Assignements/Device/Device and Pin Options/Configuration/Enable input tri-state on active configuration pins in user mode

If i understand this link correctly, then this should do the trick

https://www.intel.com/content/www/us/en/programmable/quartushelp/17.0/mapIdTopics/mwh1465495267624.htm

but somehow the pins are not tri-stated even with this option enabled.

We are working with active serial configuration scheme.

I'm using quartus 18.0

regards.

ShafiqY_Intel's avatar
ShafiqY_Intel
Icon for Frequent Contributor rankFrequent Contributor
6 years ago

Hi JSieg4,

If possible, can you send your design?

and also, send the screenshot of "the pins are not tri-stated even with this option enabled."?

I want to duplicated on my side.

Cheers