Forum Discussion
Hi,
Do you have any update from your side?
Hi, there
I linked the IRQ signal from the timer to the HPS and mmBridge like GHRD did to their button PIO ips.
Downloaded and ran the fpga design on my board and it turns out worked well.
So I believe the hardware part is done for now.
The issue is on software, I tried to figure out how to request, call and disable an IRQ through C,and I finished reading through the MPU part in Cyclone V handbook and IP handbook for Altera.
It terns out to be little helpful.
Now I'm reading the .dts file from the GHRD and the following is the capture of the button ip.
Also I found some information on hps_0.h, it's a define of an irq id as figuer 2 discribed.
But other than that I don't know what to do next.
Here are my list of questions:
1. I uploaded the fpga design to my board through the JTAG port and worked well(I made the led blink), is that mean the hardware design is done?
2.On softwware design, what should I do next?
3.When I used the Altera IP, I usually don't know how to link the parts, for example: there is a timer ip,thimer------->mmBridge------>f2h_bridge ,and I linked it to the fpga_only bridge, but I don't know why I need to link to these bridges, do you guys have any explination doc or turtour resources for qsys?
that's all, thanks for your reply BTW.
reguards.