How long does it take for the entire process of Stratix 10 CvP Update?

​Polling of the CVP_CREDIT and error status are documented in the Intel document and it seems that they are required. If none of the polling of the CVP_CREDIT and error status is required, Intel may need to update the document. It is questionable why the CPV_CREDIT register exists in the driver flow and if the error status polling is skipped whether the error status in any 4KB transfer will stick to the end of the process.

If both CVP_CREDIT and error status could be skipped, at least the error status at the end of the CvP Update process needs to be polled, and in this case, it will take at least 1 min to find out whether there is any error unless there exists a register bit to indicate that the status is ready. Is there any such register bit?