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MapleDoi's avatar
MapleDoi
Icon for New Contributor rankNew Contributor
5 years ago

How does memory mapping work in DE1-SoC between HPS-FPGA using FIFO?

After a few detail study on the data transfer between HPS and FPGA, I slowly have some idea on how it works. I found a tutorial on data transfer between HPS and FPGA using memory mapped FIFO from r...
EBERLAZARE_I_Intel's avatar
EBERLAZARE_I_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,

I am unsure on the Cornell tutorial, but is the line 36 which defines the FIFO_WRITE_BLOCK function the one you are looking for?

Looking at it, it seems that the function is the FIFO write's memory block.

For the data speed comparison, there is no performance specs that is documented that could be found, but based on my experience it highly depends on the users on which method is more convenience for them to execute.

MapleDoi's avatar
MapleDoi
Icon for New Contributor rankNew Contributor
5 years ago

Hi,

yes, the line 36, I just saw that.

Does it means I just need to define that, and then straight away can use the FIFO_WRITE_BLOCK, regardless the headers...

Sorry my C is not quite well as I developed my function in Python, then only found that only C can do HPS-FPGA data transfer.

Thank you.