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sraha's avatar
sraha
Icon for New Contributor rankNew Contributor
7 years ago

How can we calculate the number of Flip Flops ( used by our application) from the resource utilization report generated by Quartus prime?

Given the resource utilization report of FPGA ( number of ALMs, ALUTs, and registers) I need to find the total number of FFs in the final design

2 Replies

  • Vicky1's avatar
    Vicky1
    Icon for Regular Contributor rankRegular Contributor
    7 years ago

    Hi,

    First perform "Analysis & Synthesis" in the Tasks pane, When synthesis is done then check the summary of the Analysis & Synthesis for Total Registers(Flip flops) in report.

    Regards,

    Vicky

    • sraha's avatar
      sraha
      Icon for New Contributor rankNew Contributor
      7 years ago

      Hi Vicky,

      Thank you for you reply.

      I am using AOC to compile my OpenCL code. The report I got from Quartus II is shown below. Do you mean that to estimate the total number of FFs used in the design we have to consider the second row only (registers)?

      ****************************************

      ALUTs: 127794

      Registers: 167,764

      Logic utilization: 115,080 / 427,200 ( 27 % )

      I/O pins: 177 / 928 ( 19 % )

      DSP blocks: 1 / 1,518 ( < 1 % )

      Memory bits: 3,400,176 / 55,562,240 ( 6 % )

      RAM blocks: 394 / 2,713 ( 15 % )

      Actual clock freq: 260.0

      Kernel fmax: 260.14

      1x clock fmax: 260.14

      2x clock fmax: 10000

      Highest non-global fanout: 22332

      **********************************************

      Looking forward to hearing from you soon.

      Thanks,

      Samah