Forum Discussion
SAnan1
New Contributor
New ContributorHow are number of lanes in PCIe related to the actual data width I use in my application logic?
I am very confused about these things: [a] Transfer rate [b] Throughput [c] line rate [d] width of data transfer [e] PCIE Express version [f] number of lanes [g] PCIE Express generations Plea...
SengKok_L_Intel
Regular Contributor
Regular ContributorHi,
For transfer rate, line rate and throughput, you can get the answer from the following link Figure 1 & Table 1.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_a10_pcie_avmm.pdf
For some other basic PCIe specification, you can just refer to the Wikipedia:
https://en.wikipedia.org/wiki/PCI_Express
Regards -SK
