Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

High Bandwidth LVDS interface with Altera Dev. Kits

Hi, I would like to connect 16 adcs with LVDS interface to FPGA. Each ADC will use 600mbps data rate. I am looking for a development kit that is capable of handling this much data. Also I need ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

A1: 1.6Gbps is bandwidth of each LVDS, but you need to carefully design your board to achieve that performance

A2: HSMC connector generally connect LVDS lines.

"Arria V SoC Development Kit and SoC Embedded Design Suite" have 2GB of DDR3 memory but your requirements are incomplete..