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Apart from using a suitable logic level, I2C requires also strong pull-up resistors and a bidirectional level-translator at least for SDA. This isn't a matter of using a particular FPGA I/O pin but of a right hardware design with the HSMC to Santa Cruz adapter. I can't see from your post, if the I2C requirements are met.
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This is strange, I was told repeatedly from multiple sources that I2C required WEAK pull-up resistors. Perhaps this changes with the alternate interface? The level translators are bi-directional and should not be the problem.
Thanks
Honored Contributor
