Help with Flash memory reading

I don't know a HDL code for flash programming. Mostly, this is done from embedded processor, e. g. NIOS II. But as I said, it's surely possible, involving a state machine to step through the various states of unlocking sequence. Also a flash has to be erased before reprogramming.

Including a VHDL component in Verilog is easy, it's actually done in Quartus megafunctions in many places (using both directions). You simply interface a VHDL component as it would be a Verilog module. There is a restriction with ModelSim that you can use old style# ( ) parameter syntax for generics only. In Quartus, you can also use defparam syntax to set VHDL generics. For the opposite direction, you write a component declaration that correspondends to a Verilog module and instantiate it as it would be a VHDL.