Forum Discussion
AAnil3
New Contributor
6 years agoHello, I've replaced cyclone 3 fpga with cyclone 5. But I'm confused pin assignments I made. Q1) Is there any way to verify pin assignments I've done? Q2) Can quartus prime used for verifying pin assignments? Thanks in Advance!
- 6 years ago
In that case, you can follow here:
https://www.intel.com/content/www/us/en/homepage.html -> product -> FPGA and Programmable device -> cyclone V(example) -> Documentations and Support ->
Cyclone V Device Family Pin Connection Guidelines (PDF)
Do this for the same for cyclone III for comparison. After review the above, iF Quartus able to compile without any timing error and Fitter error. it should be good to go.
Thanks
sstrell
Super Contributor
6 years agoYou can also run an I/O Assignment Analysis from the Processing menu at any time. The Fitter normally does this during a full compilation, but you can save time by running it manually before performing a full compilation and fixing issues at that point.
#iwork4intel
AAnil3
New Contributor
6 years agoThanks for the suggestion. I'll try that.