Forum Discussion
HI Andre,
The other possibility that I can think off that may affect TSE auto-nego functionality is whether user configure all the required register setting correctly.
Have you cross check your TSE design register setting vs the TSE reference design link that I shared with you earlier ?
Attached are some of the register setting that's related to TSE auto-negotiation feature. KIndly review to ensure you set them correctly.
Thanks.
Regards,
dlim
- AHart26 years ago
New Contributor
Hi Dlim,
sorry I forgot to tell you that I'm not using the TSE MAC but have connected the PCS/PMA to a
CYCLONE V SOC HPS MAC using an appropriate bridging system - of course data between the
clock domains is properly synchronized using FIFO units. As far as I understand the MAC itself
is not involved in the AUTONEG process, this is solely carried out by the PCS/PMA. I'm using
this configuration also in SGMII mode, means the SGMII bridge is enabled. In the SGMII mode
autonegotiation between PCS and the PHY device is carried out properly. However in 1000Base-X
mode the AUTONEG is never carried out properly even whith those switches that connect to
the PCS I can see that AUTONEG process in 1000 Base-X mode is multiply repeated and
the sniffing device that listens on the optical connection shows messages like 'malformed packets'.
Obviously some end devices ( switches ) are tolerant enough to deal with this and some are not.
In the latter case I can see that the end device simply does not accept the initial autoneg sequence
( /C/ with dev_availability set to 0x00 ).
When the AUTONEG is turned off on both sides, the 1000Base-X works properly.
If there is a way to debug this via JTAG/Signal Tap connection I will try this next, maybe
this video gives some information.
https://www.youtube.com/watch?v=LKMNAmFLtEg
Best regards,
Andre