Hello. Any verilog example to write-read-erase(previous write location)-write back(the erase location)-read back to MAX10 UFM flash memory ?
Able to write and read back but stuck at erase and write back and read back ?

Question

Board test is DECA MAX10 fpga board.

johnt_altera · Answer

Hi,You may refer to example design from https://fpgacloud.intel.com/devstore/platform/17.1std.1/Standard/i2c-remote-system-update-example/ or https://fpgacloud.intel.com/devstore/platform/17.0.0/Standard/utilizing-the-user-flash-memory-ufm-on-max-10-devices-with-a-nios-ii-processor/ in order to implement the write, read and erase on Max 10 device

Forum Discussion

Hello. Any verilog example to write-read-erase(previous write location)-write back(the erase location)-read back to MAX10 UFM flash memory ? Able to write and read back but stuck at erase and write back and read back ?

1 Reply

Recent Discussions

Agilex™ 7 FPGA M-Series Development Kit_HBM2e Edition_REVB2_Altera

Agilex 7 R-Tile PIPE Direct endpoint receives Set_Slot_Power_Limit, but no Config TLPs

SyncE clock as the reference for DDR, HBM, and FPGA control interfaces in the Agilex M-Series design

R-tile CXL base hard IP example for the Agilex 7 M-series Dev Kit (DK_DEV_AGM039EA) does not work

PCIe Root Complex on DK-A5E013BM16AEA