Forum Discussion
Altera_Forum
Honored Contributor
13 years agoI did not try it fully, since, I found it to be a bit complicated.
But, I found that this error in my case was due to trying to run the ref design under Win 7. I believe it is possible to try it only under Win Xp 32 bit. Give that a try maybe using VMWare. I have moved on to another ref design which is much simpler, form Xillybus. Try to google Xillybus and you should be there. It gives a basic fee of the PCIe communications. Stream read/ write. Writing/ reading to/from FPGA SDRAM etc.