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Altera_Forum
Honored Contributor
Honored ContributorGetting multiple fan-out errors when compiling a scratch Nios with DDR SDRAM support
Hi, I'm new to FPGA, working with the Altera CIII Dev Kit. I've created a base Nios system running from on-chip mem, successfully controlling pio's via SW. Now I went to add DDR SDRAM supp...
Altera_ForumHonored Contributor
Honored ContributorHi again,
Turned out that I was using the term 'correctly' a bit cassually! The error came from the fact that I had assigned bidirectional ports on the Nios to output-pins instead of bidir-pins! Cheers, Erik
