Forum Discussion
SERMASWATHIKA
Contributor
ContributorFW_CODE_NOT_WORKING_WHEN_CONFIGURED_FPGA_WITH_JIC_PROGRAMMING
Hi Team, We tried to check the jic file programming setup in Cyclone v gt eval board. For that we have created the system in FPGA design like this: nios ii reset and exception vector param...
Farabi_Altera
Regular Contributor
Regular ContributorHello,
I am sorry, I am replacing previous Application Engineer as he is no longer with us.
Can you try to follow this guide: https://www.intel.com/content/dam/support/us/en/programmable/support-resources/fpga-wiki/asset03/nios-ii-processor-booting-from-cfi-flash.pdf
regards,
Farabi
SERMASWATHIKAContributor
ContributorHi Farabi,
Ok, we will check and let you know.
i have checked the document which you have shared.
In that configuration, passive parallelx16 is mentioned,
but eval board which we are having is cyclonve v gt eval. In that manual , configuration is active serial mode
Is that ok to use the programming setup in this eval board?
