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druva1's avatar
druva1
Icon for Occasional Contributor rankOccasional Contributor
5 years ago
Solved

full constraints file for the Arria 10 PAC

Hi,

I have in my pc (windows) an Arria 10 PAC. I would like to program it with Quartus Prime Pro as a normal FPGA and not use the Acceleration Stack for Intel or AFU.

I am searching for the full constraints file for the board and the pinout (clocks and PCIe ports location) of the board so I can test a small PCIe example.

I appreciate the help, thanks.

2 Replies

  • EricMunYew_C_Intel's avatar
    EricMunYew_C_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    5 years ago

    Hi, the info you request is not available and it is confidential, as the Arria 10 PAC card is created for acceleration platform and flow.


    • druva1's avatar
      druva1
      Icon for Occasional Contributor rankOccasional Contributor
      5 years ago

      It is ok, thanks.