Hi Hans,
sorry but I think the design example you found will not bring you any further with your problem. I had some time yersterday evening and looked into the example and your code again. I then decided to put that all aside and program an example from scratch. So I started with the "standard" design example from the Nios Evaluation Kit CD v8.0 and implemented FrameReader and Output to the LCD by using the LCDVideoSyncGenerator. With a bit of tweaking after my first try (I typed one declaration wrong) I had a design. I then created some NIOS Code where I have read back the written data to be able to verify, that all registers and Ram is set right. This example works well, except the problem I had with some of my projects before, that the LCD is flickering heavily. (mixing VIP with VideoSyncGenerator => Avalon Video Protocoll vs. Avalon Protocoll)
I then also tried to implement the IP Core using the Clocked Video Output in my new created design, but then I got no output at all. Then also I ran out of time, because even I must sleep sometimes ;-) I took your first code of experiment5 again and replaced the CVO against one LCDVideoSyncGenerator. I really expected that to work. I created a new Nios Project and used my code from the other now running project. in the bsp Editor I edited everything, so that the whole code is run and stored in the ssram. Unfortunately I got nothing out of your design again, perhaps there is some fault in the pinning or anything like that.
Feel free to further investigate this issue, I have attached my testsystem to this thread for you. I thought once more about it and I think you could try to implement the CVO together withe the FrameReader. Perhaps there was just something with the pinning not right, as I tested the system, because my verilog is not so good.
Good luck, yours Peet.
(Please be aware, it's a RAR-File although the fileextension says .zip)